On the three central days of the conference week, a keynote will be delivered as the opening event to address hot topics of relevance in the conference scope.
IEC-61508 Certification of mixed-criticality systems based on multicore and partitioning
Tuesday morning, 09:30
Abstract: The development of mixed-criticality systems that integrate applications of different criticality levels (safety, security and real-time) may allow for considerable cost-size-weight reduction, for increased reliability and capacity for scaling. However, this very same integration poses several important challenges with respect to current safety certification standards. This keynote presents a safety concept for a SIL3 fail-safe wind turbine mixed-criticality control system based on COTS multicore partitioning that complies with IEC-61508, a cross-domain reference safety standard. The safety concept has been positively assessed by a certification body.
Short bio: Dr. Jon Pérez is head of the embedded systems research line at IKERLAN, working on the design and development of safety-critical embedded systems, for example SIL4 railway signaling (ERTMS/ETCS). He is a certified TÜV Functional Safety engineer for the design of hardware and software based on the IEC-61508 standard. He has received a B. Eng in Industrial and Robotics at Mondragon University, a M.Sc. in Electronics & Electrical Engineering with distinction at the University of Glasgow and he finished his doctoral studies in Computer Science at Technische Universitaet Wien (TU Wien) in the field of safety-critical embedded systems.
Software Development of Safety-Critical Railway Systems
Wednesday morning, 09:30
Abstract: The strong rise of the railway sector in the last decade of the 20th century created the need for more complex systems with greater safety, reliability, availability, and maintainability requirements. In order to help with the definition and performance of these systems, various European standards have been defined with the participation of both technology companies and operators. The CENELEC 50128 is one of the standards that regulate the development of software for railway control and protection systems.
This keynote presents a strategy defined by the Research & Development department at Siemens Rail Automation to develop the majority of its safety-critical systems in order to achieve conformance with this standard by reviewing all the lifecycle of the software.
Short bio: Mr. Javier Rodríguez is currently responsible for Mass Transit ATP systems in the Research and Development department at Siemens Rail Automation. During two decades he has been participating as software engineer, system engineer, and project manager in the definition, specification, development, implementation, verification, and validation of real-time safety-critical embedded systems fulfilling the CENELEC standard defined for these systems. He graduated as a Telecommunication Engineer at the Technical University of Madrid (UPM) in 1995, and is certified in Software Testing by the British Computer Society.
The central on-board computer of the Philae lander in the context of the Rosetta space mission
Thursday morning, 09:30
Abstract: The Rosetta-Philae space mission is an unprecedented venture. After a ten-year journey across the Solar System and many complicated manoeuvres, the Rosetta spacecraft smoothly approached a small (2-4 km in diameter) celestial body, comet CG/67P. Furthermore, the spacecraft executed additional fine manoeuvres to fly a multitude of low and high altitude orbits around the comet, mapping its shape and surface in detail never seen before, and has continued to observe it for a year since then. The Rosetta spacecraft is equipped with scientific instruments that deliver a wealth of new knowledge about the CG/67P comet, in addition to spectacular pictures. Delivering the Philae lander onto the surface of the comet 500 million km away from Earth was also a remarkable technological success. The direct measurements made by the Philae lander on the surface of the comet provided significant new knowledge. The first half of the talk gives a brief overview of the objectives and highlights of the Rosetta-Philae mission. In the other part of the talk the major hardware and software design aspects, including the conceptual design and implementation of the central on-board computer (CDMS) of the Philae lander are outlined. This will illustrate the implementation of fault tolerance, autonomous operation and operational flexibility by means of specific linked data structures and code execution mechanisms that can be interpreted as a kind of object-oriented model for mission sequencing.
Short biography: Andras Balazs graduated from the Faculty of Electrical Engineering at the Technical University of Budapest in 1982. Since then - with two temporary interruptions - he has been working for the Space Physics and Technology Department at KFKI Research Institute for Particle and Nuclear Physics (now Wigner Research Centre for Physics), Budapest, Hungary, as a research-, hardware- and software engineer. Between 1989 and 1990 he worked for the Max Planck Institut für Extraterrestrische Physik, Garching/Munich, Germany. Between 2003 and 2010 he worked for the Deutsches Zentrum für Luft- und Raumfahrt, Cologne, Germany. During the past three decades he has participated as hardware and software system designer of flight and ground support equipment, either as team member or team leader in numerous space projects such as: Venus-Halley, Freja, Mars-Phobos, Spectrum X-ray Gamma, Mars-96 and Rosetta-Philae. He prepared the conceptual hardware and software design of the fault tolerant central on-board computer of the Philae lander, led and contributed to the implementation, supported its testing, validation and operation in space. He has more than 40 publications.